BACKGROUND
Embedded encryption is a critical aspect of modern computing, providing security to data. However, power side-channel attacks (P-SCAs) specifically target cryptographic implementations by analyzing physical power parameter variations of cryptographic systems during operations to glean information from the system, leveraging the embedded encryption against itself. This specific attack style poses an existential threat to the concept of encryption security as it is more difficult to detect these attacks relative to other side-channel attacks (e.g., electromagnetic or timing) and they can be launched remotely. Countermeasures, such as hiding or masking power consumption to control information leakage have been proposed to reduce the risk. While these protocols can create additional hurdles to clear, determined attackers can work through them, and they do nothing to detect an attack being levied. There is a clear and present need for detection methods of P-SCAs in embedded encryption systems.
SUMMARY OF TECHNOLOGY
Researchers at OSU have developed a detection system that detects power side-channel attacks through monitoring battery impedance. The invention can effectively detect any malicious power analysis side-channel probing that occurs inside a Li-Ion or other type of primary or secondary battery pack. The principle for detection is through continuous monitoring of the battery impedance for any unexpected increases in the impedance value, signaling the occurrence of a P-SCA. One possible hardware implementation of the detection system consists of a 10-bit ADC, an NPN transistor, a diode, and sense resistors. The accompanying detection algorithm can also be employed on a commercial off-the-shelf Arduino microcontroller. This novel approach provides advantages over previous works on stopping side-channel attacks by focusing on the signature of a P-SCA, rather than focusing on the impact of a P-SCA on the on-chip power grid. By focusing on this primary signature, assumptions on attack style do not need to be made, creating 100% coverage of attacks, as well as a more computationally and energy efficient system than on-chip power delivery networks.
POTENTIAL AREAS OF APPLICATION
MAIN ADVANTAGES
STAGE OF DEVELOPMENT